A multicore processor typically employs a memory hierarchy including multiple caches to store data for the processor cores. In some configurations, the memory hierarchy includes a dedicated cache for each processor core, one or more shared caches, and system memory. Each processor core stores data predicted to be accessed soon at its dedicated cache, data predicted to be accessed somewhat later at the one or more shared caches, and data that is not predicted to be accessed (or predicted to be accessed much later) at the system memory. To enhance processor efficiency, the one or more shared caches are typically designed to have a relatively large capacity as compared to the dedicated caches. In addition, to reduce access latency to the memory hierarchy, the one or more shared caches are typically operated with a relatively high voltage as compared to the system memory. The one or more shared caches can therefore contribute significantly to the power consumption of the processor.
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